2026-09-19T14:40:08Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/415522022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
John K. DeBrosse and Anantha P. Chandrakasan.
Qazi, Masood
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2008-05-19T15:00:13Z
2008-05-19T15:00:13Z
2007
2007
http://hdl.handle.net/1721.1/41552
220933302
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 129-131).
The circuits for a A 4kb array of Magnetic Tunnel Junctions (MTJs) have been designed and fabricated in a 0:18¹m CMOS process with three levels of metal. Support circuitry for addressing, reading, writing, and test mode probing enables the characterization of the switching of a thin-film ferromagnetic layer in the MTJs. Specifically, novel mechanisms involving spin-transfer or thermal assistance can be studied and compared to current MRAM designs that switch the MTJ with current-induced magnetic fields. Using this array design, both high speed digital and quasi-static dI/dV experiments can be conducted to investigate the nature of the MTJ resistance hysteresis and process variation in addition to the switching behavior under both polarities of current.
by Masood Qazi.
M.Eng.
131 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
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http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A 4kb memory array for MRAM development
Four kilobyte memory array for Magnetic Random Access Memory development
Thesis
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<Abstract>The circuits for a A 4kb array of Magnetic Tunnel Junctions (MTJs) have been designed and fabricated in a 0:18¹m CMOS process with three levels of metal. Support circuitry for addressing, reading, writing, and test mode probing enables the characterization of the switching of a thin-film ferromagnetic layer in the MTJs. Specifically, novel mechanisms involving spin-transfer or thermal assistance can be studied and compared to current MRAM designs that switch the MTJ with current-induced magnetic fields. Using this array design, both high speed digital and quasi-static dI/dV experiments can be conducted to investigate the nature of the MTJ resistance hysteresis and process variation in addition to the switching behavior under both polarities of current.</Abstract>
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