2026-09-19T05:53:20Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/416562022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Arvind.
Lin, Chun-Chieh
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2008-05-19T16:05:59Z
2008-05-19T16:05:59Z
2007
2007
http://hdl.handle.net/1721.1/41656
219733601
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
Includes bibliographical references (p. 75).
In this thesis, I present a implementation of a H.264 decoder designed in Bluespec SystemVerilog, a high level hardware description language. This design is intended to serve both as a more understandable reference code, as well as a starting point for efficient hardware implementations. I illustrate this by modifying this initial design to meet a performance requirement of 720p at 60 frames per second.
by Chun-Chieh Li.
M.Eng.
75 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by
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http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
Implementation of H.264 Decoder in Bluespec SystemVerilog
Thesis
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