2026-09-21T09:39:32Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/465172022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Eric Kimball and Michael Perrott.
Sundar, Siddharth
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2009-08-26T16:40:48Z
2009-08-26T16:40:48Z
2008
2008
http://hdl.handle.net/1721.1/46517
405613481
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
Includes bibliographical references (p. 86-87).
A multistage bandgap circuit with very high power supply rejection ratio was designed and simulated. The key features of this bandgap include multiple power modes, low power consumption and a novel resistor trimming strategy. This design was completed in deep submicron CMOS technology, and is especially suited for portable applications. The bandgap designed achieves over 90 dB of power supply rejection and less than 17 microvolts of noise without any external filtering. With an external filtering capacitor, this performance is significantly enhanced. In addition, the design includes an efficient voltage-to-current converter and a fast-charge circuit for charging the external capacitor.
by Siddharth Sundar.
M.Eng.
87 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by
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http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A low power high power supply rejection ratio bandgap reference for portable applications
Thesis
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