<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-19T14:23:06Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/63025" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/63025</identifier><datestamp>2022-01-13T07:54:29Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">Akintunde Ibitayo Akinwande.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Niu, Ying, M. Eng. Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2011-05-23T18:04:13Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2011-05-23T18:04:13Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2009</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2009</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/63025</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">720986529</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (p. 56-58).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">This research investigates the use of vertical silicon ungated field effect transistors (FETs) as current limiters to individuallycontrol emission current in a field emitter and provide a simple solution to three problems that have plagued field emission arrays-emission current uniformity, emission current stability and reliability. The ungated FET is an high aspect ratio silicon pillar individually connected in series with silicon or carbon nanofiber (CNF) emission tip. The transistors were designed as high aspect ratio silicon pillars in order to achieve velocity saturation of carriers and obtain current source-like characteristics. Device and process simulations were initially conducted to solidify the derived analytical model and optimize design parameters. Devices were fabricated and characterized in the Microsystems Technology Laboratory. The main outcome of this study is that individual control of field emitter current is feasible using un-gated FETs based vertical Si pillars.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Ying Niu.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">M.Eng.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">58 p.</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by 
copyright. They may be viewed from this source for any purpose, but 
reproduction or distribution in any format is prohibited without written 
permission. See provided URL for inquiries about permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">Current limiters based on silicon pillar un-gated FET for field emission application</dim:field>
   <dim:field mdschema="dc" element="type" lang="en_US">Thesis</dim:field>
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	&lt;Language>eng&lt;/Language>
   	&lt;Title>Current limiters based on silicon pillar un-gated FET for field emission application&lt;/Title>
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   	&lt;PublicationDate>2009&lt;/PublicationDate>
   	&lt;Authors>
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        	&lt;DisplayName>Niu, Ying, M. Eng. Massachusetts Institute of Technology&lt;/DisplayName>
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            &lt;DisplayName>Massachusetts Institute of Technology&lt;/DisplayName>
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    &lt;License>http://dspace.mit.edu/handle/1721.1/7582&lt;/License>
    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>This research investigates the use of vertical silicon ungated field effect transistors (FETs) as current limiters to individuallycontrol emission current in a field emitter and provide a simple solution to three problems that have plagued field emission arrays-emission current uniformity, emission current stability and reliability. The ungated FET is an high aspect ratio silicon pillar individually connected in series with silicon or carbon nanofiber (CNF) emission tip. The transistors were designed as high aspect ratio silicon pillars in order to achieve velocity saturation of carriers and obtain current source-like characteristics. Device and process simulations were initially conducted to solidify the derived analytical model and optimize design parameters. Devices were fabricated and characterized in the Microsystems Technology Laboratory. The main outcome of this study is that individual control of field emitter current is feasible using un-gated FETs based vertical Si pillars.&lt;/Abstract>
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