<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-20T11:19:06Z</responseDate><request verb="GetRecord" identifier="oai:dspace.mit.edu:1721.1/75662" metadataPrefix="dim">https://dspace.mit.edu/server/oai/request</request><GetRecord><record><header><identifier>oai:dspace.mit.edu:1721.1/75662</identifier><datestamp>2022-01-13T07:54:29Z</datestamp><setSpec>com_1721.1_7582</setSpec><setSpec>com_1721.1_7581</setSpec><setSpec>col_1721.1_131023</setSpec></header><metadata><dim:dim xmlns:dim="http://www.dspace.org/xmlns/dspace/dim" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.dspace.org/xmlns/dspace/dim http://www.dspace.org/schema/dim.xsd">
   <dim:field mdschema="dc" element="contributor" qualifier="advisor" lang="en_US">David J. Perreault.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="author" lang="en_US">Lim, Seungbum</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="other" lang="en_US">Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="contributor" qualifier="department">Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="accessioned">2012-12-13T18:50:13Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="available">2012-12-13T18:50:13Z</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="copyright" lang="en_US">2012</dim:field>
   <dim:field mdschema="dc" element="date" qualifier="issued" lang="en_US">2012</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="uri">http://hdl.handle.net/1721.1/75662</dim:field>
   <dim:field mdschema="dc" element="identifier" qualifier="oclc" lang="en_US">818661850</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Cataloged from PDF version of thesis.</dim:field>
   <dim:field mdschema="dc" element="description" lang="en_US">Includes bibliographical references (p. 71).</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="abstract" lang="en_US">In a power converter specified to convert from wide-range and high-level DC voltage or AC line voltage to low-level DC voltage, satisfying high efficiency, high power density, and high power factor is challenging because of the higher device stress and difficulty of maintaining ZVS/ZCS conditions. Our purpose of the proposed two-stage power conversion architecture is to manage this high peak voltage stress and widely-varying operating conditions and to reduce dissipation by placing a switched capacitor pre-regulator stage in front of a very high frequency DC-DC converter stage. Our proposed two-stage architecture has been designed, built, and tested.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="statementofresponsibility" lang="en_US">by Seungbum Lim.</dim:field>
   <dim:field mdschema="dc" element="description" qualifier="degree" lang="en_US">S.M.</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="extent" lang="en_US">71 p.</dim:field>
   <dim:field mdschema="dc" element="language" qualifier="iso" lang="en_US">eng</dim:field>
   <dim:field mdschema="dc" element="publisher" lang="en_US">Massachusetts Institute of Technology</dim:field>
   <dim:field mdschema="dc" element="rights" lang="en_US">M.I.T. theses are protected by 
copyright. They may be viewed from this source for any purpose, but 
reproduction or distribution in any format is prohibited without written 
permission. See provided URL for inquiries about permission.</dim:field>
   <dim:field mdschema="dc" element="rights" qualifier="uri" lang="en_US">http://dspace.mit.edu/handle/1721.1/7582</dim:field>
   <dim:field mdschema="dc" element="subject" lang="en_US">Electrical Engineering and Computer Science.</dim:field>
   <dim:field mdschema="dc" element="title" lang="en_US">A Merged two-stage power conversion architecture with switched capacitor circuit for an LED driver module</dim:field>
   <dim:field mdschema="dc" element="title" qualifier="alternative" lang="en_US">2-stage power conversion architecture with switched capacitor circuit for an LED driver module</dim:field>
   <dim:field mdschema="dc" element="type" lang="en_US">Thesis</dim:field>
   <dim:field mdschema="dc" element="format" qualifier="mimetype">application/pdf</dim:field>
   <dim:field mdschema="dspace" element="entity" qualifier="type">Publication</dim:field>
   <dim:field mdschema="others" element="access-status">unknown</dim:field>
   <dim:field mdschema="others" element="access-status">unknown</dim:field>
   <dim:field mdschema="cerif" element="openaire" authority="" confidence="-1">&lt;Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="8787876e-cc2a-4695-9bb6-2f8cd00ddbae">
	&lt;Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843&lt;/Type>
	&lt;Language>eng&lt;/Language>
   	&lt;Title>A Merged two-stage power conversion architecture with switched capacitor circuit for an LED driver module&lt;/Title>
   	&lt;Subtitle>2-stage power conversion architecture with switched capacitor circuit for an LED driver module&lt;/Subtitle>
   	&lt;PublishedIn>
    	&lt;Publication>
      	&lt;/Publication>
   	&lt;/PublishedIn>
   	&lt;PublicationDate>2012&lt;/PublicationDate>
   	&lt;Authors>
      	&lt;Author>
        	&lt;DisplayName>Lim, Seungbum&lt;/DisplayName>
         	&lt;Affiliation>
         		&lt;OrgUnit>
         		&lt;/OrgUnit>
         	&lt;/Affiliation>
      	&lt;/Author>
	&lt;/Authors>
   	&lt;Editors>
	&lt;/Editors>
    &lt;Publishers>
        &lt;Publisher>
            &lt;DisplayName>Massachusetts Institute of Technology&lt;/DisplayName>
            &lt;OrgUnit />
        &lt;/Publisher>
    &lt;/Publishers>
    &lt;License>http://dspace.mit.edu/handle/1721.1/7582&lt;/License>
    &lt;Keyword>Electrical Engineering and Computer Science.&lt;/Keyword>
   	&lt;Abstract>In a power converter specified to convert from wide-range and high-level DC voltage or AC line voltage to low-level DC voltage, satisfying high efficiency, high power density, and high power factor is challenging because of the higher device stress and difficulty of maintaining ZVS/ZCS conditions. Our purpose of the proposed two-stage power conversion architecture is to manage this high peak voltage stress and widely-varying operating conditions and to reduce dissipation by placing a switched capacitor pre-regulator stage in front of a very high frequency DC-DC converter stage. Our proposed two-stage architecture has been designed, built, and tested.&lt;/Abstract>
	&lt;Access xmlns="http://purl.org/coar/access_right" 
    >
    &lt;/Access>
&lt;/Publication>
</dim:field>
</dim:dim>
</metadata></record></GetRecord></OAI-PMH>