2026-09-20T04:21:04Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/848862022-01-13T07:54:01Zcom_1721.1_7582com_1721.1_7581col_1721.1_131022
David J. Perreault.
Giuliano, David (David Michael)
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2014-02-10T16:58:36Z
2014-02-10T16:58:36Z
2013
http://hdl.handle.net/1721.1/84886
868690734
Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 216-224).
This thesis introduces a two-stage architecture that combines the strengths of switched capacitor (SC) techniques (small size, light-load performance) with the high efficiency and regulation capability of switch-mode power converters. The resulting designs have a superior efficient-power density trade-off over traditional designs. These power converters can provide numerous lowvoltage outputs over a wide input voltage range with a very fast dynamic response, which are ideal for powering logic devices in the mobile and high-performance computing markets. Both design and fabrication considerations for power converters using this architecture are addressed. The results are demonstrated in a 2.4 W dc-dc converter implemented in a 180 nm CMOS IC process and co-packaged with its passive components for high-performance. The converter operates from an input voltage of 2.7 V to 5.5 V with an output voltage of </= 1.2 V, and achieves a 2210 W/inch³ power density with >/= 80% efficiency.
by David Giuliano.
Ph.D.
224 pages
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
Miniaturized, low-voltage power converters with fast dynamic response
Thesis
application/pdf
false
Publication
unknown
unknown
<Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="8339a1e4-750f-49cc-95bb-a5eef0b2604b">
<Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type>
<Language>eng</Language>
<Title>Miniaturized, low-voltage power converters with fast dynamic response</Title>
<PublishedIn>
<Publication>
</Publication>
</PublishedIn>
<PublicationDate>2013</PublicationDate>
<Authors>
<Author>
<DisplayName>Giuliano, David (David Michael)</DisplayName>
<Affiliation>
<OrgUnit>
</OrgUnit>
</Affiliation>
</Author>
</Authors>
<Editors>
</Editors>
<Publishers>
<Publisher>
<DisplayName>Massachusetts Institute of Technology</DisplayName>
<OrgUnit />
</Publisher>
</Publishers>
<License>http://dspace.mit.edu/handle/1721.1/7582</License>
<Keyword>Electrical Engineering and Computer Science.</Keyword>
<Abstract>This thesis introduces a two-stage architecture that combines the strengths of switched capacitor (SC) techniques (small size, light-load performance) with the high efficiency and regulation capability of switch-mode power converters. The resulting designs have a superior efficient-power density trade-off over traditional designs. These power converters can provide numerous lowvoltage outputs over a wide input voltage range with a very fast dynamic response, which are ideal for powering logic devices in the mobile and high-performance computing markets. Both design and fabrication considerations for power converters using this architecture are addressed. The results are demonstrated in a 2.4 W dc-dc converter implemented in a 180 nm CMOS IC process and co-packaged with its passive components for high-performance. The converter operates from an input voltage of 2.7 V to 5.5 V with an output voltage of </= 1.2 V, and achieves a 2210 W/inch³ power density with >/= 80% efficiency.</Abstract>
<Access xmlns="http://purl.org/coar/access_right"
>
</Access>
</Publication>