2026-09-19T17:12:03Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/873292022-01-13T07:54:01Zcom_1721.1_7582com_1721.1_7581col_1721.1_131022
Jesús A. del Alamo.
Fiorenza, James G. (James George), 1972-
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2014-05-23T19:19:38Z
2014-05-23T19:19:38Z
2002
2002
http://hdl.handle.net/1721.1/87329
52060481
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.
Includes bibliographical references (p. 161-168).
This thesis studied thin-film Silicon-on-Insulator (SOI) LDMOSFET technology for RF power amplifier applications. To conduct this study, two generations of SOI RF power devices for portable wireless systems were designed and fabricated. Bulk silicon LDMOSFETs were also made and used as a bench-mark for comparison with the SOI LDMOSFETs. A metal/polysilicon damascene gate process was developed to reduce the gate resistance and achieve high RF power gain. The advantages and disadvantages of SOI for RF power applications were analyzed using these devices. This research showed that the primary advantage of SOI in RF power applications was the reduction of RF substrate loss due to the presence of the buried oxide. SOI was shown to reduce both drain substrate loss and pad substrate loss. Both contributed to an improvement in the device's power efficiency. An improvement of 5 percentage points of efficiency was demonstrated relative to bulk LDMOSFETs at 1.9 GHz. The SOI devices achieved excellent performance: over 62 % PAE at 1.9 GHz with 200 mW of output power at a Vdd of 3.6 V.
(cont.) The two main disadvantages of SOI in RF power applications were reduced breakdown voltage and increased self-heating effects, but this research showed that they do not limit the device performance. Adequate on-state breakdown voltage was achieved through the use of an under-source body contact. Self-heating did not affect amplifier performance even with 500 mW of output power from a single power cell. High-resistivity (2000 Q-cm) bulk silicon and SOI substrates were explored in an effort to achieve additional reductions in substrate loss in RF power LDMOSFETs. High-resistivity bulk silicon reduced drain substrate loss and significantly increased efficiency relative to bulk silicon. High-resistivity SOI did not significantly reduce drain substrate loss or increase efficiency over standard SOI. The reason for this was the presence of an inversion layer at the buried oxide/handle wafer interface. This inversion layer shunted RF drain current to ground, muting the benefit of high-resistivity SOI.
by James G. Fiorenza.
Ph.D.
168 p.
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
Design and fabrication of an RF power LDMOSFET on SOI
RF power LDMOSFET on SOI
Radio frequency power lateral double diffused metal oxide semiconductor field-effect transistor silicon-on-insulator
Thesis
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<Abstract>This thesis studied thin-film Silicon-on-Insulator (SOI) LDMOSFET technology for RF power amplifier applications. To conduct this study, two generations of SOI RF power devices for portable wireless systems were designed and fabricated. Bulk silicon LDMOSFETs were also made and used as a bench-mark for comparison with the SOI LDMOSFETs. A metal/polysilicon damascene gate process was developed to reduce the gate resistance and achieve high RF power gain. The advantages and disadvantages of SOI for RF power applications were analyzed using these devices. This research showed that the primary advantage of SOI in RF power applications was the reduction of RF substrate loss due to the presence of the buried oxide. SOI was shown to reduce both drain substrate loss and pad substrate loss. Both contributed to an improvement in the device's power efficiency. An improvement of 5 percentage points of efficiency was demonstrated relative to bulk LDMOSFETs at 1.9 GHz. The SOI devices achieved excellent performance: over 62 % PAE at 1.9 GHz with 200 mW of output power at a Vdd of 3.6 V.</Abstract>
<Abstract>(cont.) The two main disadvantages of SOI in RF power applications were reduced breakdown voltage and increased self-heating effects, but this research showed that they do not limit the device performance. Adequate on-state breakdown voltage was achieved through the use of an under-source body contact. Self-heating did not affect amplifier performance even with 500 mW of output power from a single power cell. High-resistivity (2000 Q-cm) bulk silicon and SOI substrates were explored in an effort to achieve additional reductions in substrate loss in RF power LDMOSFETs. High-resistivity bulk silicon reduced drain substrate loss and significantly increased efficiency relative to bulk silicon. High-resistivity SOI did not significantly reduce drain substrate loss or increase efficiency over standard SOI. The reason for this was the presence of an inversion layer at the buried oxide/handle wafer interface. This inversion layer shunted RF drain current to ground, muting the benefit of high-resistivity SOI.</Abstract>
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