2026-09-19T09:25:57Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/879392021-07-05T14:03:20Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Hae-Seung Lee.
Yang, Xi, Ph. D. Massachusetts Institute of Technology
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2014-06-13T22:34:38Z
2014-06-13T22:34:38Z
2014
2014
http://hdl.handle.net/1721.1/87939
880166778
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 103-105).
An 8th-order continuous-time (CT) bandpass delta-sigma modulator has been designed and simulated in a 65 nm CMOS process. This modulator achieves in simulation 25 MHz signal bandwidth at 250 MHz center frequency with a signal-to- noise ratio (SNR) of 75.5 dB. The modulator samples at 1 GS/s while consuming 319 mW. On the system level, the feedback topology secures stability for the 8th-order system, achieving a maximum stable input range of -1.9 dBFS. A 2.5-V/1.2-V dual-supply loop filter with a feed-forward coupling path has been proposed to suppress noise and distortion. On the transistor level, a 5th -order dual-supply feed-forward operational amplifier (op amp) and a 4th-order single-supply feed-forward op amp have been designed to enable high modulator linearity and coefficient accuracy.
by Xi Yang.
S.M.
105pages
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
Design of a continuous-time bandpass delta-sigma modulator
Design of a CT bandpass delta-sigma modulator /
Thesis
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<Abstract>An 8th-order continuous-time (CT) bandpass delta-sigma modulator has been designed and simulated in a 65 nm CMOS process. This modulator achieves in simulation 25 MHz signal bandwidth at 250 MHz center frequency with a signal-to- noise ratio (SNR) of 75.5 dB. The modulator samples at 1 GS/s while consuming 319 mW. On the system level, the feedback topology secures stability for the 8th-order system, achieving a maximum stable input range of -1.9 dBFS. A 2.5-V/1.2-V dual-supply loop filter with a feed-forward coupling path has been proposed to suppress noise and distortion. On the transistor level, a 5th -order dual-supply feed-forward operational amplifier (op amp) and a 4th-order single-supply feed-forward op amp have been designed to enable high modulator linearity and coefficient accuracy.</Abstract>
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