2026-09-22T02:15:17Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/89532022-01-13T07:54:29Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Donald E. Troxel and Carl V. Thompson.
Alam, Syed Mohiul, 1975-
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2005-08-23T16:37:34Z
2005-08-23T16:37:34Z
2001
2001
http://hdl.handle.net/1721.1/8953
48995407
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.
Includes bibliographical references (p. 107-112).
Recent developments in semiconductor processing technology has enabled the fabrication of a single integrated circuit (IC) with multiple device-interconnect layers or wafers stacked on each other. This approach is commonly referred to as the 3D integration of ICs. Although there has been significant research on the impact of 3D integration on chip size, interconnect delay, and overall system performance, the reliability issues in the 3D interconnect arrays are largely unknown. In this research, a novel Reliability Computer Aided Design (RCAD) tool ERNI-3D has been developed for reliability analysis of interconnects in a 3D IC. Using this tool, circuit designers can get interactive feedback on the reliability of their circuits associated with electromigration, 3D bonding, and joule heating. Based on a joint probability distribution, a full-chip reliability model combines all reliability figures from different components to give a useful number for the designers' reference. This initial version of ERNI-3D treats 3D circuits with two wafers or device-interconnect layers in the stack. However, the data-structures and algorithms in the tool are generic enough to make it compatible with 3D circuits with more than two device-interconnect layers, and to allow incorporation of more sophisticated reliability models in the future. Since 3D integration technology is not yet widespread, and no CAD tool supports IC layouts for such a technology, a novel layout methodology has been implemented in 3DMagic by extending MAGIC, a widely used layout editor in academia. Apart from the CAD tool work, this research has also led to the development of, and interesting experiments with, some 3D circuits for testing ERNI-3D. The test circuits investigated are a 3D 8-bit adder and an FPGA.
by Syed Mohiul Alam.
S.M.
112 p.
9309187 bytes
9308949 bytes
application/pdf
application/pdf
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
ERNI-3D : a technology-generic tool for interconnect reliability projections in 3D integrated circuits
Technology-generic tool for interconnect reliability projections in 3D integrated circuits
Thesis
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