2026-09-19T14:07:15Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/901402022-01-13T07:54:01Zcom_1721.1_7582com_1721.1_7581col_1721.1_131023
Gregory W. Wornell and Adam R. Margetts.
Romero, David Luis
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2014-09-19T21:42:06Z
2014-09-19T21:42:06Z
2014
2014
http://hdl.handle.net/1721.1/90140
890152009
Thesis: S.M. in Electrical Engineering, Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
21
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 113-114).
An analysis of rateless codes implemented at the physical layer is developed. Our model takes into account two aspects of practical communication system design that are abstracted away in many existing works on the subject. In particular, our model assumes that : (1) practical error detection methods are used to determine when to terminate decoding; and (2) performance and reliability as observed at the transport layer are the metrics of interest. Within the context of these assumptions, we then evaluate two recently proposed high-performing rateless codes. Using our analysis to guide an empirical study, the process of selecting the best rateless code for a given set of system constraints is illustrated.
by David Luis Romero.
S.M. in Electrical Engineering
115 pages
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
A comparative analysis of physical-layer rateless coding architectures
Thesis
application/pdf
Publication
unknown
unknown
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