2026-09-19T22:57:04Zhttps://dspace.mit.edu/server/oai/requestoai:dspace.mit.edu:1721.1/938232026-06-16T18:14:38Zcom_1721.1_7582com_1721.1_7581col_1721.1_131022
Vladimir Stojanović.
Moss, Benjamin (Benjamin Roy)
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
2015-02-05T18:25:32Z
2015-02-05T18:25:32Z
2014
2014
http://hdl.handle.net/1721.1/93823
900638523
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 161-164).
Processor manufacturers have turned to parallelism to continue to improve processor performance, and the bandwidth demands of manycore systems are rising. Silicon photonics can lower the energy-per-bit of core-to-core and core-to-memory interconnects while simultaneously alleviating bandwidth bottlenecks. In this work, methods of controlling the amount of charge entering the diode structure of a photonic modulator are investigated to achieve high energy efficiency in a constrained monolithic process. Two digital modulator topologies are simulated, fabricated and tested. One circuit topology, intended to drive a carrier-injection-based ring modulator, uses a digital push-pull topology with preemphasis to reduce the energy-per-bit and to prevent the ring's optical passband from shifting to the next optical channel. The second circuit topology drives a depletion-mode modulator device for high energy efficiency and speed. High-level system modeling is addressed, as well as practical considerations such as packaging. This work marks the first monolithic transceiver in a zero-change CMOS process, and the most energy-efficient monolithically-integrated modulator in a sub-100 nm CMOS process.
by Benjamin Moss.
Ph.D.
164 pages
eng
Massachusetts Institute of Technology
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Electrical Engineering and Computer Science.
High-speed modulation of resonant CMOS photonic modulators in deep-submicron CMOS
Thesis
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<Abstract>Processor manufacturers have turned to parallelism to continue to improve processor performance, and the bandwidth demands of manycore systems are rising. Silicon photonics can lower the energy-per-bit of core-to-core and core-to-memory interconnects while simultaneously alleviating bandwidth bottlenecks. In this work, methods of controlling the amount of charge entering the diode structure of a photonic modulator are investigated to achieve high energy efficiency in a constrained monolithic process. Two digital modulator topologies are simulated, fabricated and tested. One circuit topology, intended to drive a carrier-injection-based ring modulator, uses a digital push-pull topology with preemphasis to reduce the energy-per-bit and to prevent the ring's optical passband from shifting to the next optical channel. The second circuit topology drives a depletion-mode modulator device for high energy efficiency and speed. High-level system modeling is addressed, as well as practical considerations such as packaging. This work marks the first monolithic transceiver in a zero-change CMOS process, and the most energy-efficient monolithically-integrated modulator in a sub-100 nm CMOS process.</Abstract>
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