SHARC : self-healing analog with RRAM and CNFETs

Abstract

Next-generation applications require processing on massive amount of data in real-time, exceeding the capabilities of electronic systems today. This has spurred research in a wide-range of areas: from new devices to replace silicon-based field-effect transistors (FETs) to new circuit and system architectures with fine-grained and dense integration of logic and memory. However, isolated improvements in just one area is insufficient. Rather, enabling these next-generation applications will require combining benefits across all levels of the computing stack: leveraging new devices to realize new circuits and architectures. For instance, carbon nanotube (CNT) field-effect transistors (CNFETs) for logic and Resistive Random-Access Memory (RRAM) for memory are two promising emerging nanotechnologies for energy-efficient electronics. However, CNFETs suffer from inherent imperfections (such as of metallic CNTs, m-CNTs), which have prohibited realizing large-scale CNFET circuits in the past. This work proposes a circuit design technique that integrates and combines the benefits of both CNFETs with RRAM to realize three-dimensional (3D) circuits that are immune to m-CNTs. Leveraging this technique, we show the first experimental demonstration of CNFET-based analog mixed-signal circuits.