Safe Exploration for Dynamic Computer Systems Optimization
Author(s)
Kim, Hyunji
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Advisor
Carbin, Michael J.
Ding, Yi
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Modern computer systems need to execute under strict safety constraints (e.g., power limit), but doing so often conflicts with their ability to deliver high performance (i.e., minimal latency). To meet these conflicting goals, prior work uses machine learning to automatically tune hardware resources such that system executions meet safety constraints optimally. Such solutions monitor past system executions to learn the system’s behavior under different hardware resource allocations before dynamically tuning resources to optimize the application execution. However, system behavior can change significantly between different applications and even different inputs of the same applications. Hence, models learned using data collected a priori are often suboptimal and violate safety constraints when used with new applications and/or inputs.
To address this limitation, I introduce the concept of an execution space, which is the cross product of hardware resources, input features, and applications. Thus, a configuration is defined as a tuple of hardware resources, input features, and application. To dynamically and safely allocate hardware resources from the execution space, I present SCOPE 1 , a resource manager that leverages a novel safe exploration framework. SCOPE operates iteratively, with each iteration (i.e., reallocation) having three phases: monitoring, safe space construction, and objective optimization. To construct a safe set with high coverage (i.e., a high number of safe configurations in the predicted safe set), SCOPE introduces a locality preserving operator so that SCOPE’s exploration will rarely violate the safety constraint and have small magnitude violations if it does. I evaluate SCOPE’s ability to deliver improved latency while minimizing power constraint violations by dynamically configuring hardware while running a variety of Apache Spark applications. Compared to prior approaches that minimize power constraint violations, SCOPE consumes comparable power while improving latency by up to 9.5×. Compared to prior approaches that minimize latency, SCOPE achieves similar latency but reduces power constraint violation rates by up to 45.88×, achieving almost zero safety constraint violations across all applications.
Date issued
2022-05Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
Massachusetts Institute of Technology