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A placement/interconnect channel router : cutting your PI into slices

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A placement/interconnect channel router : cutting your PI into slices

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Author: Koschella, James Joseph
Other Contributors: Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor: Ronald L. Rivest.
Department: Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Publisher: Massachusetts Institute of Technology
Date Issued: 1981
Description:
Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1981.MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING.
URI: http://hdl.handle.net/1721.1/15713
Keywords: Electrical Engineering and Computer Science., Integrated circuits Very large scale integration

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