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A CMOS-compatible compact display

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dc.contributor.advisor Hae-Seung Lee and Akintunde I. Akinwande. en_US
dc.contributor.author Chen, Andrew R. (Andrew Raymond) en_US
dc.contributor.other Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.date.accessioned 2008-02-28T16:18:52Z
dc.date.available 2008-02-28T16:18:52Z
dc.date.copyright 2005 en_US
dc.date.issued 2005 en_US
dc.identifier.uri http://dspace.mit.edu/handle/1721.1/33934 en_US
dc.identifier.uri http://hdl.handle.net/1721.1/33934
dc.description Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. en_US
dc.description Includes bibliographical references (p. 119-127). en_US
dc.description.abstract Portable information devices demand displays with high resolution and high image quality that are increasingly compact and energy-efficient. Microdisplays consisting of a silicon CMOS backplane integrated with light generating or modifying devices, are being developed for direct-view and projection applications. A microdisplay architecture using silicon light emitters and image intensification suitable for a micro-projector application is developed. A standard low-voltage CMOS IC incorporating display drivers and an array of avalanche diodes produces a faint optical image, and an image intensifier efficiently amplifies the image to useful brightness. This architecture has high efficiency and the potential to achieve adequate luminance for projection applications. A proof-of-concept system with 16x32 arrays is implemented and evaluated. A high-performance silicon backplane for the above system is designed, implemented, and evaluated. The backplane is a standard CMOS die including a 360x200 pixel array with silicon light emitters, and 10b precision current-mode driver circuits. The driver circuits can support a number of emissive display technologies including silicon light emitters and organic light emitting diode (OLED). en_US
dc.description.abstract (cont.) They employ a self-calibration technique based on the current copier circuit to minimize variation and fixed-pattern noise while reducing circuit area by a factor of five to seven compared to a conventional solution. A circuit technique to improve the retention time of dynamic analog memories is also presented. This technique allows a dynamic analog memory to retain 10b precision for 500ms at room temperature. en_US
dc.description.provenance Made available in DSpace on 2008-02-28T16:18:52Z (GMT). No. of bitstreams: 2 67548549.pdf: 15240802 bytes, checksum: adf84c650d6c6db4033db9e37ca1b253 (MD5) 67548549-MIT.pdf: 15240613 bytes, checksum: b87b91cabf914088533dca4335d7e2bc (MD5) Previous issue date: 2005 en
dc.description.statementofresponsibility by Andrew Chen. en_US
dc.format.extent 127 p. en_US
dc.language.iso eng en_US
dc.publisher Massachusetts Institute of Technology en_US
dc.rights M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. en_US
dc.rights.uri http://dspace.mit.edu/handle/1721.1/33934 en_US
dc.rights.uri http://dspace.mit.edu/handle/1721.1/7582
dc.subject Electrical Engineering and Computer Science. en_US
dc.title A CMOS-compatible compact display en_US
dc.title.alternative Complementary metal oxide semiconductor-compatible compact display en_US
dc.type Thesis en_US
dc.description.degree Ph.D. en_US
dc.contributor.department Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.identifier.oclc 67548549 en_US

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