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dc.contributor.advisorHae-Seung Lee.en_US
dc.contributor.authorDickson, Andrew Holdenen_US
dc.date.accessioned2007-01-10T16:01:34Z
dc.date.available2007-01-10T16:01:34Z
dc.date.copyright1994en_US
dc.date.issued1994en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/35398
dc.descriptionThesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.en_US
dc.descriptionIncludes bibliographical references (leaves 109-110).en_US
dc.description.statementofresponsibilityby Andrew Holden Dickson.en_US
dc.format.extent110 leavesen_US
dc.format.extent5156081 bytes
dc.format.extent5160652 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Scienceen_US
dc.titleA 2.5 Gb/s SONET clock and data recovery macro cellen_US
dc.typeThesisen_US
dc.description.degreeM.S.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc31305705en_US


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