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dc.contributor.advisorHenry I. Smith.en_US
dc.contributor.authorFerrera, Juan (Ferrera Uranga)en_US
dc.contributor.otherMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2005-08-22T22:52:26Z
dc.date.available2005-08-22T22:52:26Z
dc.date.copyright2000en_US
dc.date.issued2000en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/9117
dc.descriptionThesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.en_US
dc.descriptionIncludes bibliographical references (p. 259-268).en_US
dc.description.abstractElectron-beam lithography is capable of high-resolution lithographic pattern generation (down to 10 nm or below). However, for conventional e-beam lithography, pattern-placement accuracy is inferior to resolution. Despite significant efforts to improve pattern placement, a limit is being approached. The placement capability of conventional e-beam tools is insufficient to fabricate narrow-band optical filters and lasers, which require sub-micrometer-pitch gratings with a high degree of spatial coherence. Moreover, it is widely recognized that placement accuracy will not be sufficient for future semiconductor device generations, with minimum feature sizes below 100 nm. In electron-beam lithography, an electromagnetic deflection system is used in conjunction with a laser-interferometer-controlled stage to generate high-resolution patterns over large areas. Placement errors arise because the laser interferometer monitors the stage position, but the e-beam can independently drift relative to the stage. Moreover, the laser interferometer can itself drift during exposure. To overcome this fundamental limitation, the method of spatial phase-locked electron-beam lithography has been proposed. The beam position is referenced to a high-fidelity grid, exposed by interference lithography, on the substrate surface. In this method, pattern-placement performance depends upon the accuracy of the reference grid and the precision with which patterns can be locked to the grid. The grid must be well characterized to serve as a reliable fiducial. This document describes work done to characterize grids generated by interference lithography. A theoretical model was developed to describe the spatial-phase progression of interferometric gratings and grids. The accuracy of the interference lithography apparatus was found to be limited by substrate mounting errors and uncertainty in setting the geometrical parameters that determine the angle of interference. Experimental measurements were performed, which agreed well with the theoretical predictions. A segmented-grid spatial-phase locking system was implemented on a vector-scan e-beam tool to correct field placement errors, in order to fabricate high-quality Bragg reflectors for optical filters and distributed-feedback lasers. Before this work, Bragg reflectors of adequate fidelity had not been fabricated by e-beam lithography. The phase coherence of the gratings fabricated with the segmented-grid method was characterized by measuring the displacement between adjacent fields. From these measurements, field-placement errors of ~ 20 nm (mean + 3 sigma) were estimated. The segmented grid method was used to pattern Bragg gratings, which were used in the fabrication of integrated optical filters. The devices demonstrated excellent performance.en_US
dc.description.statementofresponsibilityby Juan Ferrera.en_US
dc.format.extent268 p.en_US
dc.format.extent21455048 bytes
dc.format.extent21454806 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleNanometer-scale placement in electron-beam lithographyen_US
dc.typeThesisen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc45147107en_US


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