Syllabus

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Course Meeting Times

Lectures: 2 sessions / week, 1 hour / session

Recitations: 2 sessions / week, 1 hour / session

Tutorials: 1 session / week, 1 hour / session

General Theme

Modeling/Design Topics

Charge Carriers and Transport

Electrons and holes in semiconductors; intrinsic conductivity. Doping; detailed balance and mass action; extrinsic carrier concentration and p- and n-type semiconductors. Drift; mobility and conductivity. Excess carriers; recombination; low level injection and minority carrier lifetime; photoconductivity. Diffusion; Einstein relation. Flow problems: quasi-neutrality and dielectric relaxation; focus on flow of minority carriers.

P-N Junctions

Space charge in inhomogeneously doped semiconductor. Poisson-Boltzmann equation; Debye length. Depletion approximation. Boundary conditions at edge of space charge layer. Solution of flow problem in neutral region; i-v characteristics. Depletion capacitance; diffusion capacitance. Incremental equivalent circuit. Light emitting diodes. Optical injection of carriers; photodiode; solar cell.

Bipolar Transistors

Derivation of Ebers-Moll large signal model; simplification for forward active region; base width modulation. Hybrid-π incremental model including Early effect and capacitive elements; intrinsic high frequency limitations of BJTs.

MOS Field Effect Transistors

MOS capacitor: accumulation, depletion, inversion, strong inversion; factors that control threshold voltage. MOS transistors: gradual channel approximation; i-v characteristics; channel length modulation. Incremental model including Early effect, back gate effect, and capacitive elements; intrinsic high frequency limitations of MOSFETs.

Transistor Circuits

Various single stage MOSFET and BJT amplifier configurations; resistor and current source biasing. Current source design. Resistive, current source, and active loads. Multistage amplifiers; differential pairs; direct-coupled stages. Frequency response; Miller effect; methods of open circuit and short circuit time constants.

Digital building-block circuits; MOS and bipolar inverter technologies; CMOS; memory cells. Switching transients and gate delays.

Use of SPICE as a circuit modeling tool.

Note: The order in which topics are presented above does not necessarily represent the order in which they will be discussed in class.

Course Objectives

In 6.012, students will learn to do the following:

  1. Semiconductor Physics
    Explain and apply basic concepts of semiconductor physics.
  2. Semiconductor Devices
    Describe, explain, and analyze the operation of important semiconductor devices in terms of their physical structure.
  3. Physics-based Models
    Explain, describe, and use physics-based device and circuit models for semiconductor devices of varying levels of complexity, select models appropriate to a specific need, and apply those models to analyze multi-component circuits.
  4. Circuit Analysis
    Analyze and design electronic circuits for linear amplifier and digital applications.
  5. Design
    Confront integrated device and/or circuit design problems, identify the design issues, and develop solutions.

Measurable Course Outcomes

A student completing 6.012 will be able to

  1. explain and apply the semiconductor concepts of drift, diffusion, donors and acceptors, majority and minority carriers, excess carriers, low level injection, minority carrier lifetime, quasi-neutrality, and quasi-statics;
  2. explain the underlying physics and principles of operation of p-n junction diodes, metal-oxide-semiconductor (MOS) capacitors, bipolar junction transistors (BJTs), and MOS field effect transistors (MOSFETs), and describe and apply simple large signal circuit models for these devices which include charge storage elements;
  3. create an incremental (small signal) linear equivalent circuit (LEC) model for a multi-terminal non-linear electronic device knowing its large signal characteristics, and understand and apply standard LEC models for p-n diodes, BJTs, and MOSFETs, including capacitances;
  4. determine parameter values for large signal and incremental LEC models for p-n diodes, BJTs, and MOSFETs based on knowledge of the device structure and dimensions, and of the bias condition;
  5. explain how devices and integrated circuits are laid out and fabricated, and describe modern trends in the microelectronics industry;
  6. explain, compare, and contrast the input, output, and gain characteristics of single-transistor, differential, and common two-transistor linear amplifier building block stages;
  7. use large signal and incremental LEC device models to analyze analog electronic circuits of moderate complexity, including circuits with multiple stages, nonlinear and active loads, and current source bias circuits;
  8. determine the frequency range of simple electronic circuits and understand the high frequency limitations of BJTs and MOSFETs;
  9. explain the operation and features of common MOS logic inverter stages;
  10. calculate the transfer characteristics of a CMOS inverter and explain how device dimensions and parameters impact them and inverter switching speed;
  11. understand the limitations of the various device models, identify the appropriate model for a given problem or situation, and justify the selection; and
  12. design simple devices and circuits to meet stated operating specifications.

Readings

Fonstad, C. G. Microelectronic Devices and Circuits. New York, NY: McGraw-Hill, 1994. ISBN: 0070214964. Please refer to the errata (PDF).

Neudeck, and Pierret. Modular Series on Solid State Devices . Vols. 1-4. Reading, MA: Addison-Wesley, 1982. ISBN: 0201052873.

Problem Sets

Problem sets will be handed out in Recitation each Friday and will be due the following week. You are expected to work on the problem sets individually and to hand in your own solution. Solutions submitted late will be noted as having been submitted, but there is no guarantee that they will be graded. This will depend on the availability and agreeably of the graders.

We welcome collaboration, but we also want to know who you have worked with on the problem set, and we want what you finally put down to be your own production. If you have worked closely with other students to figure out solutions to a problem set, please state so at the end of the solution you submit; this will help us confirm that problem sets were not copied and protect you from being wrongly accused.

Tutorials

The Teaching Assistants will conduct one hour tutorial sessions each week for small groups of students. Written problem set solutions will be distributed at the tutorial session immediately following the due date.

Quizzes

There will be two evening quizzes from 7:30 to 9:30 pm. The first will be Quiz #1 (Q1 of the calendar table) and the second will be Quiz #2 (Q2 of the calendar table). These exams will be "Closed Book", and you will be able to bring a 2-page, hand written crib sheet (to be handed in with your exam). You should also bring a calculator. There are no formal recitations on quiz days, but your recitation instructors will be available in their offices to answer questions during your normal recitation hours.

Design Problem

A special take-home exam problem on circuit design will be assigned in Lecture #19 (L19 of the calendar table); this assignment will be due two plus weeks later on the day of Recitation #23 (R23 of the calendar table) by 5 pm. Late design problems will not receive full credit. Students must submit a satisfactory design problem solution to receive a grade in 6.012.

Final Exam

A three hour "Closed Book" final exam will be scheduled by the Registrar.

Grading

The following algorithm will be used to establish a score for you in 6.012:

ACTIVITY PERCENTAGE
Two 1-hour Exams 20% Each
Final Exam 30%
Design Problem 15%
Problem Sets 15%