This calendar provides the main topics covered during each lecture (L), assignment due dates, quiz dates, and recitation dates (R).
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WEEK # |
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DAY 1 |
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DAY 2 |
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DAY 3 |
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DAY 4 |
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1 |
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L1 - Course Overview and Mechanics. Basics of Information |
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R1 |
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2 |
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L2 - Digital Abstraction, Combinational Logic, Voltage-Based Encoding |
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R2 |
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L3 - CMOS Technology; Power and Performance Issues |
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R3 |
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3 |
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L4 - Design of Logic Gates; Timing |
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R4 |
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L5 - Canonical Logic Forms, Synthesis, Simplification
Lab #1 Due |
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R5
Quiz #1 |
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4 |
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L6 - Storage Elements, State, Finite State Machine |
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R6 |
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L7 - D-registers, FSM Example
Lab #2 Due |
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R7 |
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5 |
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L8 - Synchronization, Metastability |
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R8 |
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L9 - Pipelining; Throughput and Latency
Lab #3 Due |
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R9 |
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6 |
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L10 - Case Study: Multipliers |
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R10 |
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L11 - Models of Computation, Programmable Architectures |
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R11
Quiz #2 |
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7 |
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R12 |
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L12 - Beta Instruction Set Architecture, Compilation
Lab #4 Due |
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R13 |
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8 |
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L13 - Machine Language Programming Issues |
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R14 |
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L14 - Stacks and Procedures |
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R15 |
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9 |
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L15 - Non-Pipelined Beta Implementation |
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R16 |
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L16 - Pipelined Beta Implementation, Bypassing |
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R17
Quiz #3 |
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10 |
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L17 - Pipeline Issues: Delay Slots, Annulment, Exceptions |
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R18 |
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L18 - Multilevel Memories; Locality, Performance, Caches
Lab #5 Due |
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R19 |
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11 |
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L19 - Case Study: Cache Design |
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R20 |
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L20 - Communication Issues: Busses, Networks, Protocols |
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R21
Quiz #4 |
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12 |
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L21 - Virtual Memory: Mapping, Protection, Contexts |
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R22 |
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L22 - Virtual machines, OS Kernel Code, Supervisor Calls, Scheduling
Lab #6 Due |
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R23 |
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13 |
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L23 - Communicating Processes: Semaphores, Synchronization, Atomicity, Deadlock |
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R24 |
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14 |
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L24 - Interrupts, Real Time |
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R25 |
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L25 - Parallel Processing, Shared Memory, Cache Coherence, Consistency Criteria |
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R26
Quiz #5 |
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15 |
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L26 - Looking Ahead: Future Computer Architectures |
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Lab #7 Due |
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