| dc.contributor.advisor | Stephen A. Ward. | en_US |
| dc.contributor.author | Antaki, Patrick R | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2017-06-06T19:22:02Z | |
| dc.date.available | 2017-06-06T19:22:02Z | |
| dc.date.copyright | 1984 | en_US |
| dc.date.issued | 1984 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/109621 | |
| dc.description | Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984. | en_US |
| dc.description | MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. | en_US |
| dc.description | Bibliography: leaves 60-61. | en_US |
| dc.description.statementofresponsibility | by Patrick R. Antaki. | en_US |
| dc.format.extent | 61 leaves : ill. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | A circular pipelined bus architecture for high-speed computation | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | B.S. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 12718240 | en_US |
