Hardware mechanisms for efficient interprocessor communication

Author(s)
Henry, Dana S. (Dana Sue)
Thumbnail
DownloadFull printable version (14.33Mb)
Advisor
Arvind.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
Metadata
Show full item record
Description
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.
 
Includes bibliographical references (p. 131-137).
 
Date issued
1996
URI
http://hdl.handle.net/1721.1/11290
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science
Collections