| dc.contributor.advisor | Arvind. | en_US |
| dc.contributor.author | Henry, Dana S. (Dana Sue) | en_US |
| dc.date.accessioned | 2005-08-18T12:00:00Z | en_US |
| dc.date.available | 2005-08-18T12:00:00Z | en_US |
| dc.date.copyright | 1996 | en_US |
| dc.date.issued | 1996 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/11290 | |
| dc.description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996. | en_US |
| dc.description | Includes bibliographical references (p. 131-137). | en_US |
| dc.description.statementofresponsibility | by Dana S. Henry. | en_US |
| dc.format.extent | 137 p. | en_US |
| dc.format.extent | 15036332 bytes | |
| dc.format.extent | 15036090 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | Hardware mechanisms for efficient interprocessor communication | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | Ph.D. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 34880419 | en_US |
