dc.contributor.advisor | Max M. Shulaker. | en_US |
dc.contributor.author | Lau, Christian Lee. | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2020-09-15T21:53:26Z | |
dc.date.available | 2020-09-15T21:53:26Z | |
dc.date.copyright | 2020 | en_US |
dc.date.issued | 2020 | en_US |
dc.identifier.uri | https://hdl.handle.net/1721.1/127349 | |
dc.description | Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, May, 2020 | en_US |
dc.description | Cataloged from the official PDF of thesis. | en_US |
dc.description | Includes bibliographical references (pages 78-82). | en_US |
dc.description.abstract | Electronics is approaching a major paradigm shift as silicon transistor scaling no longer yields historical energy-efficiency benefits, spurring research towards beyond-silicon nanotechnologies. In particular, carbon nanotube field-effect transistor (CNFET)-based digital circuits promise substantial energy-efficiency benefits, but the inability to (1) fabricate complementary metal-oxide-semiconductor (CMOS) CNFET circuits that integrate both PMOS and NMOS CNFETs and (2) perfectly control intrinsic nanoscale defects and variability in carbon nanotubes has precluded the realization of very-large-scale integrated CMOS systems. Here we propose and experimentally demonstrate a comprehensive manufacturing methodology for CNTs, which encompasses a set of original processing and circuit design techniques that are combined to overcome all of these intrinsic CNT challenges (variability, manufacturing defects, and material defects) across full industry-standard large-area substrates. As a demonstration of the feasibility of implementing this manufacturing methodology, we experimentally demonstrate the world's first microprocessor built from a beyond-silicon emerging nanotechnology: RV16X-NANO. This 16-bit microprocessor is based on the RISC-V instruction set, runs standard 32-bit instructions on 16-bit data and addresses, comprises more than 14,000 CMOS CNFETs and is designed and fabricated using industry-standard design flows and processes. This work is a major advance for carbon nanotube-based electronics, and more broadly experimentally validates a promising path towards realizing practical next-generation beyond-silicon electronic systems. | en_US |
dc.description.statementofresponsibility | by Christian Lee Lau. | en_US |
dc.format.extent | 82 pages | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | Very-large-scale-integration of complementary carbon nanotube field-effect transistors | en_US |
dc.type | Thesis | en_US |
dc.description.degree | S.M. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.identifier.oclc | 1192483926 | en_US |
dc.description.collection | S.M. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science | en_US |
dspace.imported | 2020-09-15T21:53:25Z | en_US |
mit.thesis.degree | Master | en_US |
mit.thesis.department | EECS | en_US |