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Graph preprocessing for in-memory vertex-centric graph computation on the Intel Optane DC persistent memory module

Author(s)
Sun, Mengyuan,M. Eng.Massachusetts Institute of Technology.
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Other Contributors
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Julian Shun and Sam Madden.
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MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
Processing graphs is the foundation for many social network analysis, optimization, and propagation problems. New hardware technologies like the Intel Optane persistent memory module allow in-memory graph processing for graphs of a larger scale compared to standard machines. This is made possible by augmenting dynamic random access memory (DRAM) with nonvolatile random access memory (NVRAM). However, even with faster-than-disk access and greater storage capabilities of NVRAM, DRAM and other faster level I/O such as cache still remain the more valuable resources. In this project, we analyze the effects of various graph partitioning and graph reordering techniques in order to find efficient data placement strategies for graphs stored between DRAM and NVRAM. The performance of graph data placement techniques varies depending on algorithm type and graph structure. We find that partitioned graphs for algorithms such as BFS can perform between 1.5-3x faster than ones with a naive data placement technique. The graph partitioning techniques that perform the best are lightweight degree ordering ones. We find that the best graph reordering techniques are heavily dependent on graph and algorithm type.
Description
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, September, 2020
 
Cataloged from student-submitted PDF of thesis.
 
Includes bibliographical references (pages 41-43).
 
Date issued
2020
URI
https://hdl.handle.net/1721.1/129228
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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