dc.contributor.advisor | Arvind. | en_US |
dc.contributor.author | Dave, Nirav Hemant, 1982- | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2006-03-24T18:26:27Z | |
dc.date.available | 2006-03-24T18:26:27Z | |
dc.date.copyright | 2005 | en_US |
dc.date.issued | 2005 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/30174 | |
dc.description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2005. | en_US |
dc.description | Includes bibliographical references (p. 67). | en_US |
dc.description.abstract | In this thesis, we designed a 2-way out-of-order processor in Bluespec implementing the MIPS I integer ISA. A number of scheduling optimizations were then used to bring the initial design up to the same level of cycle-level concurrency as found in standard RTL-level designs. From this, a general design methodology is proposed to effectively express, debug, and optimize large Bluespec designs. | en_US |
dc.description.statementofresponsibility | by Nirav Hemant Dave. | en_US |
dc.format.extent | 67 p. | en_US |
dc.format.extent | 2477069 bytes | |
dc.format.extent | 2483761 bytes | |
dc.format.mimetype | application/pdf | |
dc.format.mimetype | application/pdf | |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | Designing a processor in Bluespec | en_US |
dc.type | Thesis | en_US |
dc.description.degree | S.M. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.identifier.oclc | 60678546 | en_US |