| dc.contributor.advisor | Karen Pieper and Arvind. | en_US |
| dc.contributor.author | Dong, Wenyan, 1980- | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2006-06-19T17:44:46Z | |
| dc.date.available | 2006-06-19T17:44:46Z | |
| dc.date.copyright | 2004 | en_US |
| dc.date.issued | 2004 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/33140 | |
| dc.description | Thesis (M. Eng. and S.B.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004. | en_US |
| dc.description | Includes bibliographical references (leaves 62-63). | en_US |
| dc.description.abstract | This thesis presents a research project on decoder related optimizations in HDL de- signs. The goal of the research is to improve design synthesis quality-of-result, mainly in terms of area; this involves sharing decoders driven by related inputs, and map decoders using fewer number of boolean gates. Algorithms presented in this thesis were implemented in the Presto HDL compiler. A series of tests were conducted using real-world HDL designs in order to determine how effective these optimizations are. | en_US |
| dc.description.statementofresponsibility | by Wenyan Dong. | en_US |
| dc.format.extent | 63 leaves | en_US |
| dc.format.extent | 2956534 bytes | |
| dc.format.extent | 2958300 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | Improved handling of the decoding operation in the Presto compiler | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.Eng.and S.B. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 62242432 | en_US |
