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dc.contributor.advisorCharles G. Sodini.en_US
dc.contributor.authorJerng, Alberten_US
dc.contributor.otherMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2007-08-29T20:42:50Z
dc.date.available2007-08-29T20:42:50Z
dc.date.copyright2006en_US
dc.date.issued2007en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/38675
dc.descriptionThesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2007.en_US
dc.descriptionIncludes bibliographical references (p. 157-162).en_US
dc.description.abstractA low power, wideband wireless transmitter utilizing [Delta]-[Sigma] direct digital modulation of an RF carrier is presented. The transmitter architecture replaces high dynamic range analog circuits with high speed digital circuits and a passive LC bandpass filter, saving power and area compared to conventional IQ modulators for wideband systems. A prototype transmitter IC built in 0.13 pm CMOS demonstrates a data rate of 1.2 Gb/s using OFDM modulation in a bandwidth of 200 MHz centered at 5.25 GHz. The modulator consumes 187 mW and occupies a die area of 0.72 mm2. A quadrature digital-IF approach eliminates modulator LO feedthrough and image spurs from the output spectrum without requiring analog circuitry or system calibration, simplifying the design of the transmitter. The largest modulator spur is measured to be -47 dBc. Measured SNDR over a 200 MHz bandwidth is 43 dB. Successful implementation of the [Delta]-[Sigma] RF modulator requires the design of a high-Q, tunable RF bandpass filter, and a low power, high speed digital [Delta]-[Sigma] modulator. A 4th order passive LC bandpass filter with center frequency of 5.25 GHz is designed and implemented using differential coupled resonators.en_US
dc.description.abstract(cont.) Variation of the filter response over process and temperature is removed through the design of an automatic self-tuning loop that calibrates the filter center frequency to the system LO. A 2.625 GS/s, 2nd order, 3-bit digital [Delta]-[Sigma] modulator is realized through the use of a pass-gate adder circuit optimized for low power and high speed. The digital modulator is software programmable to support multiple bandwidths, frequency channels, and modulation schemes. It can be used adaptively to transmit in selected channels with variable bit-rates, depending on channel conditions. It is envisioned that the [Delta]-[Sigma] digital-RF modulator can be used as a universal transmitter for wideband systems and applications that require high data rates and low power consumption.en_US
dc.description.statementofresponsibilityby Albert Jerng.en_US
dc.format.extent162 p.en_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleDelta-Sigma digital-RF modulation for high data rate transmittersen_US
dc.title.alternativeDelta-Sigma digital-radio frequency modulation for high data rate transmittersen_US
dc.typeThesisen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc164338043en_US


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