RM³ Processing for In-plane Optical Interconnects on Si-CMOS and the Impact of Topographic Features on Losses in Deposited Dielectric Waveguides

dc.contributor.author	Barkley, Edward
dc.contributor.author	Fonstad, Clifton G. Jr.
dc.date.accessioned	2003-12-20T17:27:58Z
dc.date.available	2003-12-20T17:27:58Z
dc.date.issued	2004-01
dc.identifier.uri	http://hdl.handle.net/1721.1/3963
dc.description.abstract	This paper describes recent progress in a continuing program to develop and apply RM³ (recess mounting with monolithic metallization) technologies for heterogeneous integration. Particular emphasis is placed on the applicability of RM³ integration to in-plane geometries for on-chip optical clock and signal distribution and on the suitability of commercially processed IC wafers for use as substrates for rectangular dielectric waveguides.	en
dc.description.sponsorship	Singapore-MIT Alliance (SMA)	en
dc.format.extent	354502 bytes
dc.format.mimetype	application/pdf
dc.language.iso	en
dc.relation.ispartofseries	Advanced Materials for Micro- and Nano-Systems (AMMNS);
dc.subject	optoelectronic integration	en
dc.subject	heterogeneous integration	en
dc.subject	hybrid assembly	en
dc.subject	in-plane laser diodes	en
dc.subject	rectangular dielectric waveguides	en
dc.title	RM³ Processing for In-plane Optical Interconnects on Si-CMOS and the Impact of Topographic Features on Losses in Deposited Dielectric Waveguides	en
dc.type	Article	en