A scenario of Planning and Debugging in Electronic Circuit Design
Author(s)
Sussman, Gerald J.
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The purpose of this short document is to exhibit how a HACKER-like top-down planning and debugging system can be applied to the problem of the design and debugging of simple analog electronic circuits. I believe, and I hope to establish, that this kind of processing goes on at all levels of the problem-solving process--from specific, concrete applications, like Electronic Design, through abstract piecing together and debugging of problem-solving strategies.
Description
Work reported herein was conducted at the Artificial Intelligence Laboratory, a Massachusetts Institute of Technology research program supported in part by the Advanced Research Projects Agency of the Department of Defense and monitored by the Office of Naval Research under Contract Number N00014-70-A-0362-0005.
Working Papers are informal papers intended for internal use.
Date issued
1973-12Publisher
MIT Artificial Intelligence Laboratory
Series/Report no.
MIT Artificial Intelligence Laboratory Working Papers, WP-54