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The Connection Machine RAM Chip

Author(s)
Flynn, Anita M.
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Abstract
This document describes the three transistor NMOS dynamic ram circuit used in the connection machine. It was designed and implemented by Brewster Kahle, with the assistance of Jim Cherry, Danny Hillis and Tom Knight. Prototypes were fabricated through the APRA MOSIS facility, using both four and three micro design rules. Jim Li and I tested both runs this fall. They work. This document describes how.
Date issued
1983-01-03
URI
http://hdl.handle.net/1721.1/41189
Publisher
MIT Artificial Intelligence Laboratory
Series/Report no.
MIT Artificial Intelligence Laboratory Working Papers, WP-242

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  • AI Working Papers (1971 - 1995)

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