A hierarchical bottom-up, equation-based optimization design methodology
Author(s)Sanchez, William R
hierarchical bottom-up, equation-based optimization methodology for system-level design
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
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We have implemented a segment of an RF transmitter signal chain in discrete components using bipolar transistors. We formulated both a broadband amplifier and mixer as mathematical programs (MP) and extracted Pareto-optimal (PO) [1-3] tradeoff surfaces. Abstracting these PO surfaces in place of the blocks at the system level, we have demonstrated a new hierarchical system design methodology. Furthermore, the optimization, simulation, and measured results are consistent at all levels of hierarchy. Keywords: System design, optimization, geometric programming, analog circuits, Pareto-optimal.
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, June 2007.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections."May 2007."Includes bibliographical references (p. 79-82).
DepartmentMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.; Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.