| dc.contributor.advisor | Joel Dawson. | en_US |
| dc.contributor.author | Sanchez, William R | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2008-05-19T14:59:35Z | |
| dc.date.available | 2008-05-19T14:59:35Z | |
| dc.date.issued | 2007 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/41548 | |
| dc.description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, June 2007. | en_US |
| dc.description | This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. | en_US |
| dc.description | "May 2007." | en_US |
| dc.description | Includes bibliographical references (p. 79-82). | en_US |
| dc.description.abstract | We have implemented a segment of an RF transmitter signal chain in discrete components using bipolar transistors. We formulated both a broadband amplifier and mixer as mathematical programs (MP) and extracted Pareto-optimal (PO) [1-3] tradeoff surfaces. Abstracting these PO surfaces in place of the blocks at the system level, we have demonstrated a new hierarchical system design methodology. Furthermore, the optimization, simulation, and measured results are consistent at all levels of hierarchy. Keywords: System design, optimization, geometric programming, analog circuits, Pareto-optimal. | en_US |
| dc.description.statementofresponsibility | by William R. Sanchez. | en_US |
| dc.format.extent | 82 p. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | A hierarchical bottom-up, equation-based optimization design methodology | en_US |
| dc.title.alternative | hierarchical bottom-up, equation-based optimization methodology for system-level design | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.Eng. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 220924657 | en_US |
