Emulation of microprocessor memory systems using the RAMP design framework
Author(s)Khan, Asif I. (Asif Imtiaz)
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
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With the computer hardware industry and the academic world focused on multiprocessor systems, the RAMP project is aiming to provide the infrastructure for supporting high-speed emulation of large scale, massively-parallel multiprocessor systems using FPGAs. The RAMP design framework provides the platform for building this infrastructure. This research utilizes this design framework to emulate various microprocessor memory systems through a model built in an FPGA. We model both the latency and the bandwidth of memory systems through a parameterized emulation platform, thereby, demonstrating the validity of the design framework. We also show the efficiency of the framework through an evaluation of the utilized FPGA resources.
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 49-50).
DepartmentMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.