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dc.contributor.advisorJing Kong and Jakub Kedzierski.en_US
dc.contributor.authorHsu, Pei-Lan, M. Eng. Massachusetts Institute of Technologyen_US
dc.contributor.otherMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2009-06-30T17:24:03Z
dc.date.available2009-06-30T17:24:03Z
dc.date.copyright2008en_US
dc.date.issued2008en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/46130
dc.descriptionThesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.en_US
dc.descriptionIncludes bibliographical references (p. 91-97).en_US
dc.description.abstractMuch attention has recently been focused on graphene as an alternative semiconductor to silicon. Transistors with graphene conduction channels have only recently been fabricated and their performance remains to be optimized. In this thesis, different candidate gate dielectric materials are examined for use in graphene transistors. Evaporated HfO2 is ultimately used as the gate dielectric for graphene field effect transistors (FETs) on six different graphene samples. Two types of graphene were used: graphene made from the sublimation of SiC and epitaxial graphene synthesized by chemical vapor deposition (CVD) onto nickel. Electrical performance of the graphene transistors were found to vary significantly depending on the local graphene microstructure. The gate dielectric was found to crack on thick regions of graphene but stay intact on thin regions. Dielectric charging resulted in hysteretic effects in device performance. As consistent with HfO2 used in silicon CMOS devices, electron mobilities were lower than hole mobilities in the fabricated graphene FETs.en_US
dc.description.statementofresponsibilityby Pei-Lan Hsu.en_US
dc.format.extent97 p.en_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleChoosing a gate dielectric for graphene based transistorsen_US
dc.typeThesisen_US
dc.description.degreeM.Eng.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc392629383en_US


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