Proposed Instructions on the GE 635 for List Processing and Push Down Stacks
| dc.contributor.author | Levin, Michael | en_US |
| dc.date.accessioned | 2004-10-04T14:39:53Z | |
| dc.date.available | 2004-10-04T14:39:53Z | |
| dc.date.issued | 1964-09-01 | en_US |
| dc.identifier.other | AIM-072 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/6114 | |
| dc.description.abstract | The instructions that transmit data between the index registers and the memory work only on the left half (address) portion of memory. These instructions are LDXn (load index n from address of storage word). And STXn (store the contents of index n in address of storage word). The effective address of both of these instructions includes modification by index registers. A corresponding set of instructions for transmitting data to or from the right half of memory would facilitate list structure operations. The present order code makes it impossible to so list-chaining operations (car or cdr) without disturbing the A or Q registers. | en_US |
| dc.format.extent | 1162914 bytes | |
| dc.format.extent | 88986 bytes | |
| dc.format.mimetype | application/postscript | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en_US | |
| dc.relation.ispartofseries | AIM-072 | en_US |
| dc.title | Proposed Instructions on the GE 635 for List Processing and Push Down Stacks | en_US |
