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Algorithmic approaches to circuit enumeration problems and applications

Author(s)
Lee, Boon Chai
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DownloadFTL_R_1982_07.pdf (4.794Mb)
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Massachusetts Institute of Technology. Flight Transportation Laboratory
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Abstract
A review of methods of enumerating elementary cycles and circuits is presented. For the directed planar graph, a geometric view of circuit generation is introduced making use of the properties of dual graphs. Given the set of elementary cycles or circuits, a particular algorithm is recommended to generate all simple circuits. A simple example accompanies each of the methods discussed. Some methods of reducing the size of the graph but maintaining all circuits are introduced. Worst-case bounds on computational time and space are also given. The problem of enumerating elementary circuits whose cost is less than a certain fixed cost is solved by modifying an existing algorithm. The cost of a circuit is the sum of the cost of the arcs forming the circuit where arc costs are not restricted to be positive. Applications of circuits with particular properties are suggested.
Description
June 1982
 
Also issued as an M.S. thesis, Dept. of Aeronautics and Astronautics, 1982
 
Includes bibliographical references (p. 129-132)
 
Date issued
1982
URI
http://hdl.handle.net/1721.1/68106
Publisher
Cambridge, Mass. : Massachusetts Institute of Technology, Dept. of Aeronautics & Astronautics, Flight Transportation Laboratory, [1982]
Other identifiers
29178107
Series/Report no.
FTL report (Massachusetts Institute of Technology. Flight Transportation Laboratory) ; R82-7
Keywords
Graph theory, Algorithms, Data processing

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