System demonstration of an optically-sampled, wavelength-demultiplexed photonic analog-to-digital converter

Abstract

The performance of electronic analog-to-digital converters (ADCs) at high sampling rates is fundamentally limited by the timing jitter of electronic clocks. To circumvent this limitation, one method is to exploit the orders-of-magnitude lower timing jitter of mode-locked lasers and implement optical sampling as a front-end for electronic ADCs. The optical-sampling, wavelength-demultiplexing approach to A/D conversion, which is explored in this thesis, offers key benefits such as ease of scalability to higher aggregate sampling rates via passive wavelength-division demultiplexing (WDM) filters and potential for full integration via silicon photonics platform for chip-scale signal processing applications. This thesis will first cover the design issues for each stage in the optically-sampled, wavelength-demultiplexed photonic ADC architecture, followed by experimental results from two system demonstrations. Digitization of a 41-GHz signal with 7.0 effective bits at a sampling rate of 2 GSa/s was demonstrated with a discrete-component photonic ADC, which corresponds to 15 fs of jitter, a 4-5 times improvement over state-of-the-art electronic ADCs. On the way towards an integrated photonic ADC, a silicon chip with core photonic components was fabricated and used to digitize a 10-GHz signal with 3.5 effective bits. Drop-port transmission measurements of an integrated 20-channel WDM filter bank are included to show potential for high sampling rate operation with 10 effective bits.