dc.contributor.advisor | Franz X. Kärtner. | en_US |
dc.contributor.author | Peng, Michael Yung | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2012-01-12T19:33:13Z | |
dc.date.available | 2012-01-12T19:33:13Z | |
dc.date.copyright | 2011 | en_US |
dc.date.issued | 2011 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/68507 | |
dc.description | Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011. | en_US |
dc.description | Cataloged from PDF version of thesis. | en_US |
dc.description | Includes bibliographical references (p. 84-86). | en_US |
dc.description.abstract | The performance of electronic analog-to-digital converters (ADCs) at high sampling rates is fundamentally limited by the timing jitter of electronic clocks. To circumvent this limitation, one method is to exploit the orders-of-magnitude lower timing jitter of mode-locked lasers and implement optical sampling as a front-end for electronic ADCs. The optical-sampling, wavelength-demultiplexing approach to A/D conversion, which is explored in this thesis, offers key benefits such as ease of scalability to higher aggregate sampling rates via passive wavelength-division demultiplexing (WDM) filters and potential for full integration via silicon photonics platform for chip-scale signal processing applications. This thesis will first cover the design issues for each stage in the optically-sampled, wavelength-demultiplexed photonic ADC architecture, followed by experimental results from two system demonstrations. Digitization of a 41-GHz signal with 7.0 effective bits at a sampling rate of 2 GSa/s was demonstrated with a discrete-component photonic ADC, which corresponds to 15 fs of jitter, a 4-5 times improvement over state-of-the-art electronic ADCs. On the way towards an integrated photonic ADC, a silicon chip with core photonic components was fabricated and used to digitize a 10-GHz signal with 3.5 effective bits. Drop-port transmission measurements of an integrated 20-channel WDM filter bank are included to show potential for high sampling rate operation with 10 effective bits. | en_US |
dc.description.statementofresponsibility | by Michael Yung Peng. | en_US |
dc.format.extent | 86 p. | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | System demonstration of an optically-sampled, wavelength-demultiplexed photonic analog-to-digital converter | en_US |
dc.type | Thesis | en_US |
dc.description.degree | S.M. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.identifier.oclc | 770688278 | en_US |