Stacked switched capacitor energy buffer architecture
Author(s)Chen, Minjie, Ph. D. Massachusetts Institute of Technology
SSC energy buffer architecture
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
David J. Perreault and Khurram K. Afridi.
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Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited and their reliability is a major concern. This thesis presents a series of stacked switched capacitor (SSC) energy buffer architectures which overcome this limitation while achieving comparable effective energy density without electrolytic capacitors. The architectural approach is introduced along with design and control techniques which enable this energy buffer to interface with other circuits. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load has been built and tested with a power factor correction circuit. This thesis starts with a detailed comparative study of electrolytic, film, and ceramic capacitors, then introduces the principles of SSC energy buffer architectures, and finally designs and explains the design methodologies of a prototype circuit. The experimental results successfully demonstrate the effectiveness of the approach.
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Cataloged from student-submitted PDF version of thesis.Includes bibliographical references (p. 133-134).
DepartmentMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.