dc.contributor.advisor | Anantha P. Chandrakasan and Hae-Seung Lee. | en_US |
dc.contributor.author | Jeong, Taehoon | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2017-10-18T15:09:56Z | |
dc.date.available | 2017-10-18T15:09:56Z | |
dc.date.copyright | 2017 | en_US |
dc.date.issued | 2017 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/111917 | |
dc.description | Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. | en_US |
dc.description | Cataloged from PDF version of thesis. | en_US |
dc.description | Includes bibliographical references (pages 65-68). | en_US |
dc.description.abstract | Designing a high-gain, high-bandwidth op-amp for pipelined ADCs in fine-line CMOS technology has become increasingly challenging. In order to address this issue, this thesis presents the shadow-ADC-assisted digital calibration technique. The proposed technique relaxes op-amp performance requirements by removing op-amp-induced charge-transfer errors in the digital domain. A proof-of-concept pipelined ADC has been designed in 28nm FDSOI CMOS technology and is currently being fabricated. | en_US |
dc.description.statementofresponsibility | by Taehoon Jeong. | en_US |
dc.format.extent | 68 pages | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | A pipelined analog-to-digital converter with low-gain, low-bandwidth op-amps | en_US |
dc.type | Thesis | en_US |
dc.description.degree | S.M. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.identifier.oclc | 1005701141 | en_US |