Nanometer-precision electron-beam lithography with applications in integrated optics
Citable URI:
http://hdl.handle.net/1721.1/29949
| Title: | Nanometer-precision electron-beam lithography with applications in integrated optics |
| Author: | Hastings, Jeffrey Todd, 1975- |
| Other Contributors: | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. |
| Advisor: | Henry I. Smith. |
| Department: | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. |
| Publisher: | Massachusetts Institute of Technology |
| Issue Date: | 2003 |
| Abstract: | Scanning electron-beam lithography (SEBL) provides sub-10-nm resolution and arbitrary-pattern generation; however, SEBL's pattern-placement accuracy remains inadequate for future integrated-circuits and integrated-optical devices. Environmental disturbances, system imperfections, charging, and a variety of other factors contribute to pattern-placement inaccuracy. To overcome these limitations, spatial-phase locked electron-beam lithography (SPLEBL) monitors the beam location with respect to a reference grid on the substrate. Phase detection of the periodic grid signal provides feedback control of the beam position to within a fraction of the period. Using this technique we exposed patterns globally locked to a fiducial grid and reduced local field-stitching errors to a < 1.3 nm. Spatial-phase locking is particularly important for integrated-optical devices that require pattern-placement accuracy within a fraction of the wavelength of light. As an example, Bragg-grating based optical filters were fabricated in silicon-on-insulator waveguides using SPLEBL. The filters were designed to reflect a narrow-range of wavelengths within the communications band near 1550-nm. We patterned the devices in a single lithography step by placing the gratings in the waveguide sidewalls. This design allows apodization of the filter response by lithographically varying the grating depth. Measured transmission spectra show greatly reduced sidelobe levels for apodized devices compared to devices with uniform gratings. |
| Description: |
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003. Includes bibliographical references (p. 179-185). |
| URI: | http://hdl.handle.net/1721.1/29949 |
| Keywords: | Electrical Engineering and Computer Science. |
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