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Design, modeling, and simulation of a Compact Optoelectronic Neural Coprocessor

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dc.contributor.advisor Cardinal Warde. en_US
dc.contributor.author Simpkins, Travis L. (Travis Lee), 1977- en_US
dc.contributor.other Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.date.accessioned 2008-02-28T16:26:38Z
dc.date.available 2008-02-28T16:26:38Z
dc.date.copyright 2005 en_US
dc.date.issued 2006 en_US
dc.identifier.uri http://dspace.mit.edu/handle/1721.1/35530 en_US
dc.identifier.uri http://hdl.handle.net/1721.1/35530
dc.description Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2006. en_US
dc.description Includes bibliographical references (p. 169-174). en_US
dc.description.abstract Microprocessors have substantially increased in speed and computational power over the past two decades. However, they still are unable to solve certain classes of problems efficiently, particularly those which involve the analysis of large noisy data sets such as the case of image processing, feature extraction, and pattern recognition. Substantial research has focused on using neural network algorithms to process this type of data with much success. Most of this effort, however, has resulted in sophisticated neural network-based software algorithms rather than physical neural network hardware. Consequently, most neural network-type processing systems today consist of neural algorithms running on traditional sequential (i.e. Intel-based) microprocessors rather than on actual neurocomputers, and thus achieve less than optimal performance. The objective of the Compact Optoelectronic Neural Coprocessor (CONCOP) project is to build a compact, pixilated, parallel optoelectronic processor capable of running neural network-type algorithms in native hardware. en_US
dc.description.abstract (cont.) While much of the past research on the project has focused on designing and implementing the microphotonics and optoelectronics required for interlayer communication within the system, the work presented in this thesis will begin by focusing on the computational components, particularly the mixed-signal integrated circuits located in each pixel. After the circuits have been designed, a progressive training and simulation environment will be developed based on hierarchal system models which provide accurate, timely, and efficient performance estimates of the CONCOP while it is still in the pre-integration stage. Using this simulation platform, several simulations of the CONCOP will be performed to demonstrate the flexibility of the environment and to better understand the scalability and fault-tolerance aspects of the CONCOP. The results of a test chip containing the fundamental circuit components will also be presented. en_US
dc.description.provenance Made available in DSpace on 2008-02-28T16:26:38Z (GMT). No. of bitstreams: 2 72690362.pdf: 17670396 bytes, checksum: a9b6e320d1e6515005208607901e3582 (MD5) 72690362-MIT.pdf: 17670215 bytes, checksum: 5f9da941e8505627c5c9dc7a0cdeb33f (MD5) Previous issue date: 2006 en
dc.description.statementofresponsibility by Travis L. Simpkins. en_US
dc.format.extent 174 p. en_US
dc.language.iso eng en_US
dc.publisher Massachusetts Institute of Technology en_US
dc.rights M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. en_US
dc.rights.uri http://dspace.mit.edu/handle/1721.1/35530 en_US
dc.rights.uri http://dspace.mit.edu/handle/1721.1/7582
dc.subject Electrical Engineering and Computer Science. en_US
dc.title Design, modeling, and simulation of a Compact Optoelectronic Neural Coprocessor en_US
dc.title.alternative CONCOP en_US
dc.type Thesis en_US
dc.description.degree Ph.D. en_US
dc.contributor.department Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. en_US
dc.identifier.oclc 72690362 en_US

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