Stochastic Digital Circuits for Probabilistic Inference
Author(s)
Tenenbaum, Joshua B.; Jonas, Eric M.; Mansinghka, Vikash K.![Thumbnail](/bitstream/handle/1721.1/43712/MIT-CSAIL-TR-2008-069.pdf.jpg?sequence=5&isAllowed=y)
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Other Contributors
Computational Cognitive Science
Advisor
Joshua Tenenbaum
Metadata
Show full item recordAbstract
We introduce combinational stochastic logic, an abstraction that generalizes deterministic digital circuit design (based on Boolean logic gates) to the probabilistic setting. We show how this logic can be combined with techniques from contemporary digital design to generate stateless and stateful circuits for exact and approximate sampling from a range of probability distributions. We focus on Markov chain Monte Carlo algorithms for Markov random fields, using massively parallel circuits. We implement these circuits on commodity reconfigurable logic and estimate the resulting performance in time, space and price. Using our approach, these simple and general algorithms could be affordably run for thousands of iterations on models with hundreds of thousands of variables in real time.
Date issued
2008-11-24Series/Report no.
MIT-CSAIL-TR-2008-069
Keywords
cognitive science, robustness, Bayesian inference, artificial intelligence