dc.contributor.author | Biswas, Avishek | |
dc.contributor.author | Sinangil, Yildiz | |
dc.contributor.author | Chandrakasan, Anantha P. | |
dc.date.accessioned | 2016-04-20T17:40:37Z | |
dc.date.available | 2016-04-20T17:40:37Z | |
dc.date.issued | 2014-09 | |
dc.identifier.isbn | 978-1-4799-5696-8 | |
dc.identifier.isbn | 978-1-4799-5694-4 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/102279 | |
dc.description.abstract | This paper presents a fully integrated, reconfigurable switched-capacitor based step-up DC-DC converter in a 28nm FDSOI process. Three reconfigurable step-up conversion ratios (5/2, 2/1, 3/2) have been implemented which can provide a wide range of output voltage from 1.2V to 2.4V with a nominal input voltage of 1V. We propose a topology for the 5/2 mode which improves the efficiency by reducing the bottom-plate parasitic loss compared to a conventional series-parallel topology, while delivering the same amount of output power. Further, the proposed topology benefits from using core 1V devices for all charge-transfer switches without incurring any voltage overstress. The converter can deliver load current in the range of 10 μA to 500 μA, achieving a peak efficiency of 88%, using only on-chip MOS and MOM capacitors for a high density implementation. | en_US |
dc.description.sponsorship | United States. Defense Advanced Research Projects Agency | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/ESSCIRC.2014.6942074 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Prof. Chandrakasan via Phoebe Ayers | en_US |
dc.title | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Biswas, Avishek, Yildiz Sinangil, and Anantha P. Chandrakasan. “A 28nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-up DC-DC Converter with 88% Peak Efficiency.” ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC) (September 2014). | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Chandrakasan, Anantha P. | en_US |
dc.contributor.mitauthor | Biswas, Avishek | en_US |
dc.contributor.mitauthor | Sinangil, Yildiz | en_US |
dc.contributor.mitauthor | Chandrakasan, Anantha P. | en_US |
dc.relation.journal | Proceedings of the 40th European Solid State Circuits Conference (ESSCIRC) | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Biswas, Avishek; Sinangil, Yildiz; Chandrakasan, Anantha P. | en_US |
dc.identifier.orcid | https://orcid.org/0000-0002-6368-3684 | |
dc.identifier.orcid | https://orcid.org/0000-0002-5977-2748 | |
mit.license | OPEN_ACCESS_POLICY | en_US |