dc.contributor.author | Wu, Yufei | |
dc.contributor.author | Sasangka, Wardhana A. | |
dc.contributor.author | del Alamo, Jesus A | |
dc.date.accessioned | 2020-07-14T19:37:15Z | |
dc.date.available | 2020-07-14T19:37:15Z | |
dc.date.issued | 2017-10 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.issn | 1557-9646 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/126185 | |
dc.description.abstract | The electrical degradation of InAlN/GaN high-electron-mobility transistors for millimeter-wave applications has been examined under simultaneous high V [subscript DS,stress] and high I[subscript Dstress] electrical stress. Besides a drain current decrease and a positive threshold voltage shift, the creation of an anomalous source-side gate leakage path has been identified. We attribute this to high electric-field induced trap generation in the AlN layer directly under the gate edge on the source side. The resulting increase in gate leakage further exacerbates the degradation of the gate diode. In addition, we postulate that high-power stress leads to significant device self-heating that causes gate sinking and leads to a permanent positive threshold voltage shift and drain current degradation. | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/ted.2017.2754248 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Prof. del Alamo via Phoebe Ayers | en_US |
dc.title | Anomalous Source-Side Degradation of InAlN/GaN HEMTs Under High-Power Electrical Stress | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Wu, Yufei et al. "Anomalous Source-Side Degradation of InAlN/GaN HEMTs Under High-Power Electrical Stress." IEEE Transactions on Electron Devices 64, 11 (November 2017): 4435 - 4441 © 2017 IEEE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microsystems Technology Laboratories | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.department | Singapore-MIT Alliance in Research and Technology (SMART) | en_US |
dc.relation.journal | IEEE Transactions on Electron Devices | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.date.submission | 2020-07-09T19:40:32Z | |
mit.journal.volume | 64 | en_US |
mit.journal.issue | 11 | en_US |
mit.license | OPEN_ACCESS_POLICY | |
mit.metadata.status | Complete | |