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Fabrication and process characterization of atom transistor chips

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Title: Fabrication and process characterization of atom transistor chips
Author: Chuang, H.C.; Salim, E.A.; Vuletic, V.; Anderson, D.Z.; Bright, V.M.
Department: Massachusetts Institute of Technology. Dept. of Physics; MIT-Harvard Center for Ultracold Atoms
Publisher: Institute of Electrical and Electronics Engineers
Issue Date: 2009-10
Abstract: This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200 nm. The wires can carry current densities of more than 7.5times10[superscript 7] A/cm[superscript 2]. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.
URI: http://hdl.handle.net/1721.1/58962
Other Identifiers: INSPEC Accession Number: 10917191
ISBN: 978-1-4244-4190-7
978-1-4244-4193-8
Citation: Chuang, H.C. et al. “Fabrication and process characterization of atom transistor chips.” Solid-State Sensors, Actuators and Microsystems Conference, 2009. TRANSDUCERS 2009. International. 2009. 1305-1308. © 2009 IEEE
Version: Final published version
Terms of Use: Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Published as: http://dx.doi.org/10.1109/SENSOR.2009.5285870
Journal: Proceedings of the Solid-State Sensors, Actuators and Microsystems Conference, 2009

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