dc.contributor.author | Ram, Rajeev J. | |
dc.date.accessioned | 2016-01-27T17:14:53Z | |
dc.date.available | 2016-01-27T17:14:53Z | |
dc.date.issued | 2015-04 | |
dc.identifier.issn | 0277-786X | |
dc.identifier.uri | http://hdl.handle.net/1721.1/101003 | |
dc.description.abstract | Here, I review the development of a polysilicon photonic platform that is optimized for integration with electronics fabricated on bulk silicon wafers. This platform enables large-scale monolithic integration of silicon photonics with microelectronics. A single-polysilicon deposition and lithography mask were used to simultaneously define the transistor gate, the low-loss waveguides, the depletion modulators, and the photodetectors. Several approaches to reduce optical scattering and mitigate defect state absorption are presented. Waveguide propagation loss as low as 3 dB/cm could be realized in front-end polysilicon with an end-of-line loss as low as 10 dB/cm at 1280nm. The defect state density could be enhanced to enable all-silicon, infrared photodetectors. The resulting microring resonant detectors exhibit over 20% quantum efficiency with 9.7 GHz bandwidth over a wide range of wavelengths. A complete photonic link has been demonstrated at 5 Gbps that transfers digital information from one bulk CMOS photonics chip to another. | en_US |
dc.description.sponsorship | United States. Defense Advanced Research Projects Agency. Photonically Optimized Embedded Microprocessors Program (Award HR0011-11-C-0100) | en_US |
dc.language.iso | en_US | |
dc.publisher | SPIE | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1117/12.2175462 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | SPIE | en_US |
dc.title | Photonic-electronic integration with polysilicon photonics in bulk CMOS | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Ram, Rajeev J. “Photonic-Electronic Integration with Polysilicon Photonics in Bulk CMOS.” Edited by Graham T. Reed and Michael R. Watts. Silicon Photonics X (April 3, 2015). © 2015 Society of Photo-Optical Instrumentation Engineers (SPIE) | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.mitauthor | Ram, Rajeev J. | en_US |
dc.relation.journal | Proceedings of SPIE--the International Society for Optical Engineering | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dspace.orderedauthors | Ram, Rajeev J. | en_US |
dc.identifier.orcid | https://orcid.org/0000-0003-0420-2235 | |
mit.license | PUBLISHER_POLICY | en_US |
mit.metadata.status | Complete | |