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dc.contributor.authorSanchez, Daniel
dc.contributor.authorBeckmann, Nathan Zachary
dc.date.accessioned2016-02-01T21:34:26Z
dc.date.available2016-02-01T21:34:26Z
dc.date.issued2015-02
dc.identifier.isbn978-1-4799-8930-0
dc.identifier.urihttp://hdl.handle.net/1721.1/101043
dc.description.abstractCaches often suffer from performance cliffs: minor changes in program behavior or available cache space cause large changes in miss rate. Cliffs hurt performance and complicate cache management. We present Talus, a simple scheme that removes these cliffs. Talus works by dividing a single application's access stream into two partitions, unlike prior work that partitions among competing applications. By controlling the sizes of these partitions, Talus ensures that as an application is given more cache space, its miss rate decreases in a convex fashion. We prove that Talus removes performance cliffs, and evaluate it through extensive simulation. Talus adds negligible overheads, improves single-application performance, simplifies partitioning algorithms, and makes cache partitioning more effective and fair.en_US
dc.description.sponsorshipNational Science Foundation (U.S.) (Grant CCF-1318384)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/HPCA.2015.7056022en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceMIT web domainen_US
dc.titleTalus: A simple way to remove cliffs in cache performanceen_US
dc.typeArticleen_US
dc.identifier.citationBeckmann, Nathan, and Daniel Sanchez. “Talus: A Simple Way to Remove Cliffs in Cache Performance.” 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA) (February 2015).en_US
dc.contributor.departmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratoryen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.mitauthorBeckmann, Nathan Zacharyen_US
dc.contributor.mitauthorSanchez, Danielen_US
dc.relation.journalProceedings of the 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)en_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
eprint.statushttp://purl.org/eprint/status/NonPeerRevieweden_US
dspace.orderedauthorsBeckmann, Nathan; Sanchez, Danielen_US
dc.identifier.orcidhttps://orcid.org/0000-0002-6057-9769
mit.licenseOPEN_ACCESS_POLICYen_US


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