Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Name
eyeriss_manuscript_2016.pdf
Size
15.05 MB
Format
Adobe PDF
Checksum (MD5)
5b81fd2ddae63083a83b437ddab0c9a4
Author(s)
Chen, Yu-Hsin
Krishna, Tushar
Emer, Joel S.
Sze, Vivienne
Date Issued
February 2016
Journal
IEEE International Conference on Solid-State Circuits (ISSCC 2016)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Chen, Yu-Hsin, Tushar Krishna, Joel Emer, and Vivienne Sze. "Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks." in ISSCC 2016, IEEE International Solid-State Circuits Conference, Jan. 31-Feb. 4, 2016. San Francisco, CA.
Version
Author's final manuscript
Abstract
Deep learning using convolutional neural networks (CNN) gives state-of-the-art
accuracy on many computer vision tasks (e.g. object detection, recognition,
segmentation). Convolutions account for over 90% of the processing in CNNs
for both inference/testing and training, and fully convolutional networks are
increasingly being used. To achieve state-of-the-art accuracy requires CNNs with
not only a larger number of layers, but also millions of filters weights, and varying
shapes (i.e. filter sizes, number of filters, number of channels) as shown in Fig.
14.5.1. For instance, AlexNet [1] uses 2.3 million weights (4.6MB of storage) and
requires 666 million MACs per 227×227 image (13kMACs/pixel). VGG16 [2] uses
14.7 million weights (29.4MB of storage) and requires 15.3 billion MACs per
224×224 image (306kMACs/pixel). The large number of filter weights and
channels results in substantial data movement, which consumes significant
energy.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://submissions.mirasmart.com/isscc2016/PDF/ISSCC2016AdvanceProgram.pdf
