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dc.contributor.authorMaffezzoni, Paolo
dc.contributor.authorBahr, Bichoy
dc.contributor.authorZhang, Zheng
dc.contributor.authorDaniel, Luca
dc.date.accessioned2016-05-12T17:13:21Z
dc.date.available2016-05-12T17:13:21Z
dc.date.issued2015-05
dc.date.submitted2015-02
dc.identifier.issn1549-8328
dc.identifier.issn1558-0806
dc.identifier.urihttp://hdl.handle.net/1721.1/102473
dc.description.abstractBrain-inspired arrays of parallel processing oscillators represent an intriguing alternative to traditional computational methods for data analysis and recognition. This alternative is now becoming more concrete thanks to the advent of emerging oscillators fabrication technologies providing high density packaging and low power consumption. One challenging issue related to oscillator arrays is the large number of system parameters and the lack of efficient computational techniques for array simulation and performance verification. This paper provides a realistic phase-domain modeling and simulation methodology of oscillator arrays which is able to account for the relevant device nonidealities. The model is employed to investigate the associative memory performance of arrays composed of resonant LC oscillators.en_US
dc.description.sponsorshipNational Science Foundation (U.S.) (NEEDS Program)en_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/TCSI.2015.2418851en_US
dc.rightsCreative Commons Attribution-Noncommercial-Share Alikeen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/4.0/en_US
dc.sourceProf. Daniel via Phoebe Ayersen_US
dc.titleOscillator Array Models for Associative Memory and Pattern Recognitionen_US
dc.typeArticleen_US
dc.identifier.citationMaffezzoni, Paolo, Bichoy Bahr, Zheng Zhang, and Luca Daniel. “Oscillator Array Models for Associative Memory and Pattern Recognition.” IEEE Transactions on Circuits and Systems I: Regular Papers 62, no. 6 (June 2015): 1591–1598.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Research Laboratory of Electronicsen_US
dc.contributor.approverDaniel, Lucaen_US
dc.contributor.mitauthorBahr, Bichoyen_US
dc.contributor.mitauthorZhang, Zhengen_US
dc.contributor.mitauthorDaniel, Lucaen_US
dc.relation.journalIEEE Transactions on Circuits and Systems I: Regular Papersen_US
dc.eprint.versionAuthor's final manuscripten_US
dc.type.urihttp://purl.org/eprint/type/JournalArticleen_US
eprint.statushttp://purl.org/eprint/status/PeerRevieweden_US
dspace.orderedauthorsMaffezzoni, Paolo; Bahr, Bichoy; Zhang, Zheng; Daniel, Lucaen_US
dspace.embargo.termsNen_US
dc.identifier.orcidhttps://orcid.org/0000-0002-5880-3151
dc.identifier.orcidhttps://orcid.org/0000-0001-8603-8795
mit.licenseOPEN_ACCESS_POLICYen_US


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