dc.contributor.author | Haotian Liu | |
dc.contributor.author | Daniel, Luca | |
dc.contributor.author | Ngai Wong, Luca | |
dc.date.accessioned | 2016-05-12T17:49:13Z | |
dc.date.available | 2016-05-12T17:49:13Z | |
dc.date.issued | 2015-03 | |
dc.date.submitted | 2015-01 | |
dc.identifier.issn | 0278-0070 | |
dc.identifier.issn | 1937-4151 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/102475 | |
dc.description.abstract | Model order reduction of nonlinear circuits (especially highly nonlinear circuits) has always been a theoretically and numerically challenging task. In this paper, we utilize tensors (namely, a higher order generalization of matrices) to develop a tensor-based nonlinear model order reduction algorithm we named TNMOR for the efficient simulation of nonlinear circuits. Unlike existing nonlinear model order reduction methods, in TNMOR high-order nonlinearities are captured using tensors, followed by decomposition and reduction to a compact tensor-based reduced-order model. Therefore, TNMOR completely avoids the dense reduced-order system matrices, which in turn allows faster simulation and a smaller memory requirement if relatively low-rank approximations of these tensors exist. Numerical experiments on transient and periodic steady-state analyses confirm the superior accuracy and efficiency of TNMOR, particularly in highly nonlinear scenarios. | en_US |
dc.description.sponsorship | Research Grants Council (Hong Kong, China) (General Research Fund Project 718213E) | en_US |
dc.description.sponsorship | Research Grants Council (Hong Kong, China) (General Research Fund Project 17208514) | en_US |
dc.description.sponsorship | University of Hong Kong. University Research Committee | en_US |
dc.description.sponsorship | MIT International Science and Technology Initiatives | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/TCAD.2015.2409272 | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Prof. Daniel via Phoebe Ayers | en_US |
dc.title | Model Reduction and Simulation of Nonlinear Circuits via Tensor Decomposition | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Haotian Liu, Luca Daniel, and Ngai Wong. “Model Reduction and Simulation of Nonlinear Circuits via Tensor Decomposition.” IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 34, no. 7 (July 2015): 1059–1069. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.approver | Daniel, Luca | en_US |
dc.contributor.mitauthor | Daniel, Luca | en_US |
dc.relation.journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.orderedauthors | Haotian Liu; Daniel, Luca; Ngai Wong, Luca | en_US |
dspace.embargo.terms | N | en_US |
dc.identifier.orcid | https://orcid.org/0000-0002-5880-3151 | |
mit.license | OPEN_ACCESS_POLICY | en_US |